FPGA Designer

Job Posting Organization:
CERN, the European Organization for Nuclear Research, is a leading scientific research institution established in 195

• It is located in Geneva, Switzerland, and is known for its groundbreaking work in particle physics. CERN employs over 2,500 staff members and collaborates with thousands of scientists from around the world. The organization operates in multiple countries, fostering an environment of innovation and collaboration among a diverse range of professionals from various fields, including engineering, technical, scientific, and administrative roles. CERN's mission is to push the frontiers of science and technology, contributing to our understanding of the universe.

Job Overview:
The FPGA Designer position at CERN involves working on the White Rabbit project, a technology that provides sub-nanosecond synchronization and deterministic data transfer to distributed devices. The successful candidate will be responsible for developing and maintaining hardware description language (HDL) modules, primarily in VHDL, and creating simulation test benches using SystemVerilog. The role also includes assisting in the development of production tests, participating in hardware design reviews, and developing automated tests for hardware in Continuous Integration (CI) pipelines. Additionally, the FPGA Designer will engage in the hardware/software co-design process, collaborating closely with software developers to ensure seamless integration of hardware and software components. This position offers an exciting opportunity to contribute to the next generation of the White Rabbit switch, a core component of the WR network, and to be part of a fully open-source Ethernet switch design.

Duties and Responsibilities:
The FPGA Designer will have a comprehensive set of responsibilities, including:

• Developing and maintaining HDL modules, primarily using VHDL.
• Creating simulation test benches, mostly in SystemVerilog, to validate designs.
• Assisting in the development of production tests to be conducted after hardware manufacturing.
• Participating in hardware design reviews and contributing to the overall hardware design process.
• Developing automated tests to be executed on hardware within Continuous Integration (CI) pipelines.
• Writing basic low-level software and firmware to support hardware functionality.
• Collaborating in the hardware/software co-design process, ensuring that hardware, HDL, firmware, Linux device drivers, and host applications are developed and reviewed in conjunction with software developers.
• Engaging in measurements and testing using tools such as oscilloscopes and phase noise analyzers.

Required Qualifications:
Candidates must possess a professional background in Electronics Engineering or a related field. They should have either a Master's degree with 2 to 6 years of post-graduation professional experience or a PhD with no more than 3 years of post-graduation professional experience. Additionally, candidates must be nationals of a CERN Member or Associate Member State and should not have previously held a CERN fellow or graduate contract.

Educational Background:
The educational background required for this position includes a Master's degree or PhD in Electronics Engineering or a closely related field. The degree should be complemented by relevant professional experience, as specified in the required qualifications section.

Experience:
The ideal candidate should have a solid level of experience in FPGA design and development, particularly with AMD/Xilinx tools and FPGAs such as Ultrascale and Zynq. Experience in software development for bare-metal and embedded Linux environments is also essential. Candidates should be familiar with PCB design for both analogue and digital circuits and have practical experience in measurements using oscilloscopes and phase noise analyzers. Experience with Linux device drivers is considered desirable.

Languages:
Proficiency in spoken and written English is mandatory for this position. Candidates should also demonstrate a commitment to learning French, which is considered beneficial for integration into the CERN community.

Additional Notes:
This position is fully onsite and offers a contract duration of 24 months, with the possibility of extension up to a maximum of 36 months. The working hours are set at 40 hours per week, and the target start date for the position is April 1, 202

• The job reference for this position is BE-CEM-EDL-2026-16-GRAP. The compensation includes a monthly stipend ranging from 6,372 to 7,004 Swiss Francs, which is tax-free, along with 30 days of paid leave per year and additional benefits such as comprehensive health insurance coverage, family allowances, and a relocation package depending on individual circumstances. CERN also provides opportunities for on-the-job training and formal training, including language classes.