Firmware FPGA Development Engineer

Job Posting Organization:
CERN, the European Organization for Nuclear Research, is a leading scientific research institution established in 195

• It is located in Geneva, Switzerland, and is known for its groundbreaking work in particle physics. CERN employs over 2,500 staff members and collaborates with thousands of scientists from around the world. The organization operates in multiple countries, with member states from across Europe and beyond, fostering an environment of innovation and collaboration in the pursuit of scientific knowledge.

Job Overview:
The Firmware FPGA Development Engineer position within CERN's SY-BI group in the Accelerator Systems Department focuses on the development and operation of instruments that observe particle beams and measure their properties. This role is crucial for the reliable operation and optimization of CERN's accelerator complex. The engineer will be involved in creating next-generation beam-position monitoring systems for CERN's injector complex, which includes pre-accelerators and the Antimatter Decelerator. The position offers a unique opportunity to work at the intersection of digital electronics, embedded systems, real-time signal processing, and accelerator physics. Candidates with interests in FPGA or HDL development, high-speed electronics, embedded software, digital signal processing, instrumentation, or experimental physics will find this role particularly appealing. The engineer will be responsible for developing, integrating, and testing FPGA gateware and embedded SoC firmware, implementing data acquisition and processing logic, and validating system performance in both laboratory and accelerator environments. Additionally, the role involves data analysis using Python and assisting in measurement campaigns within the accelerator complex, collaborating with a diverse team of engineers, physicists, and technicians.

Duties and Responsibilities:
The primary duties and responsibilities of the Firmware FPGA Development Engineer include:

• Developing, integrating, and testing FPGA gateware and embedded SoC firmware for a SoC device.
• Implementing data acquisition and data processing logic, as well as real-time digital signal-processing algorithms.
• Validating system performance in laboratory and accelerator environments to ensure reliability and accuracy.
• Performing data analysis using Python to interpret results and improve system functionality.
• Assisting in measurement campaigns within the accelerator complex, contributing to experimental setups and data collection.
• Collaborating with experienced engineers, physicists, and technicians from various teams across CERN to ensure successful project outcomes.
• Engaging in continuous learning and professional development to stay updated with the latest advancements in the field.

Required Qualifications:
Candidates must meet the following qualifications:

• A professional background in Electronic Engineering or a related field.
• A Master's degree with 2 to 6 years of post-graduation professional experience, or a PhD with no more than 3 years of post-graduation professional experience.
• Experience in digital signal processing and demonstrated experience with FPGA and SoC technologies.
• Proficiency in software programming, particularly in Python and C++.
• Familiarity with Xilinx Zynq UltraScale+ MPSoC and/or RFSoC is advantageous.
• Knowledge of Verilog and SystemVerilog, as well as digital electronics.

Educational Background:
The educational background required for this position includes:

• A Master's degree in Electronic Engineering or a closely related field, with relevant professional experience.
• Alternatively, a PhD in a related discipline with limited post-graduation experience is acceptable. Candidates should have a strong foundation in electronic engineering principles and practices, as well as hands-on experience in relevant projects or research.

Experience:
The position requires candidates to have a specific level of experience, which includes:

• A minimum of 2 years of professional experience in digital signal processing and FPGA development for those with a Master's degree.
• For PhD holders, up to 3 years of post-graduation experience is acceptable.
• Practical experience in software programming, particularly in Python and C++, is essential.
• Familiarity with high-speed electronics and embedded systems is highly desirable, as is experience working in collaborative environments.

Languages:
The mandatory language for this position is English, both spoken and written. Candidates are expected to have a commitment to learn French, which is considered a good to have skill for effective communication within the organization and with local stakeholders.

Additional Notes:
Additional notes regarding the position include:

• The contract duration is for 24 months, with the possibility of extension up to a maximum of 36 months.
• The working hours are set at 40 hours per week, and the position is fully onsite.
• The target start date for this role is March 1, 202
• The job reference number is SY-BI-BP-2026-154-GRAP.
• The position offers a competitive monthly net stipend ranging from 6372 to 7004 Swiss Francs, depending on the candidate's degree.
• Employees are entitled to 30 days of paid leave per year, plus an additional two weeks of annual closure.
• CERN provides comprehensive health insurance coverage for employees and their families, as well as membership in the CERN Pension Fund.
• Additional benefits include family, child, and infant monthly allowances based on individual circumstances, a relocation package, and opportunities for on-the-job and formal training, including language classes.