Digital ASIC Design Engineer

Digital ASIC Design Engineer

European Organization for Nuclear Research (CERN)

April 5, 2026May 20, 2026GenevaSwitzerland
Job Description
Job Posting Organization:
CERN, the European Organization for Nuclear Research, is a leading scientific research institution established in 195
  • It is located in Geneva, Switzerland, and is known for its groundbreaking work in particle physics. CERN employs over 2,500 staff members and collaborates with thousands of scientists from around the world. The organization operates in multiple countries and is dedicated to pushing the frontiers of science and technology, fostering an environment of innovation and collaboration among diverse professionals.

Job Overview:
The Digital ASIC Design Engineer position at CERN involves working on the next generation of advanced MAPS particle-detector ASICs. The successful candidate will be responsible for the design, implementation, and verification of high-performance digital readout and control circuits. This role requires collaboration with analog and verification specialists to meet demanding targets in speed, density, power efficiency, and radiation tolerance. The engineer will conceive and optimize system-level architectures and data processing strategies, design and synthesize RTL, and manage the full RTL-to-GDS flow and physical signoff using professional EDA tools. The position also emphasizes teamwork, problem-solving, and knowledge sharing within a multidisciplinary team.

Duties and Responsibilities:
The duties and responsibilities of the Digital ASIC Design Engineer include:
  • Conceiving and optimizing system-level architectures and data processing strategies for advanced MAPS particle-detector ASICs.
  • Designing, synthesizing, and implementing RTL, including timing closure and place & route of complex designs.
  • Contributing to chip signoff through physical design checks such as DRC, LVS, and ERC, as well as power integrity analysis.
  • Participating in formal verification using UVM methodologies.
  • Managing the full RTL-to-GDS flow and physical signoff with professional EDA tools.
  • Collaborating and communicating effectively within a multidisciplinary team to achieve project goals.
  • Learning and sharing knowledge, solving problems, and achieving results through teamwork.

Required Qualifications:
Candidates must have a professional background in Electronics engineering or a related field. They should possess either a Master's degree with 2 to 6 years of post-graduation professional experience or a PhD with no more than 3 years of post-graduation professional experience. Additionally, candidates must not have previously held a CERN fellow or graduate contract.

Educational Background:
The educational background required for this position includes a Master's degree or PhD in Electronics engineering or a related field. The degree should be complemented by relevant professional experience in digital IC design and a strong understanding of VLSI principles.

Experience:
The position requires experience in digital IC design, specifically in the design and implementation of digital or mixed-signal circuits in ASICs or FPGAs. Candidates should also have experience with digital simulation techniques and tools, which would be considered an advantage.

Languages:
Proficiency in spoken and written English is mandatory, and candidates should demonstrate a commitment to learning French. Knowledge of additional languages would be beneficial but is not required.

Additional Notes:
The contract duration for this position is 24 months, with the possibility of extension up to a maximum of 36 months. The job offers hybrid flexibility, allowing for a combination of remote and on-site work. The target start date for this position is June 1, 202
  • The role may require work during nights, Sundays, and official holidays, depending on the needs of the organization. The job reference is EP-ESE-ME-2025-225-GRAP, and it falls under the field of Electrical or Electronics Engineering. The compensation includes a monthly stipend between 6372-7004 Swiss Francs per month (tax-free), 30 days of paid leave per year, comprehensive health insurance coverage, family allowances, a relocation package, and opportunities for on-the-job and formal training, including language classes.
Apply now
Similar Jobs